The present invention relates to semiconductor structures, semiconductor devices and methods of making the same.
Dangling bonds at the silicon/silicon oxide interface in semiconductor devices are believed to be the cause of observed non-ideal capacitance-voltage characteristics and reduced channel conductance. Low temperature post-metallization annealing in a hydrogen-containing atmosphere is typically used in the semiconductor device fabrication process, to passivate these dangling bonds. During operation, however, transistor performance can degrade, and this degradation has been correlated to the removal of hydrogen from the silicon/silicon oxide interface, due to collisions between heated carriers and the interface. This degradation in hot carrier lifetime (also referred to as HCl lifetime) is exacerbated by the ever ongoing miniaturization of semiconductor devices, and has become a significant limitation in the further shrinkage of semiconductor devices.
A widely used method for minimizing the degradation of HCl lifetime has been to reduce the peak of the electric field in the transistor by appropriate selection of spacer dimensions, and the implantation of ions to form lightly doped regions between the channel and the corresponding source/drain regions of the transistor. Continued miniaturization is severely limiting the usefulness of these techniques.
Another method is to replace hydrogen with deuterium during annealing, taking advantage of the increased strength of the deuterium-silicon bond as compared with the hydrogen-silicon bond. It has been discovered, however, that deuterium is unable to penetrate through silicon nitride layers, present in many semiconductor devices as etch-stop layers and gate spacers. If the deuterium annealing is carried out prior to the formation of the silicon nitride layers, the high-temperatures necessary to form the silicon nitride layers, as well as the boron-phosphorous spin glass layers conventionally used as interlayer dielectrics (formed at 750° C. or more), may cause the deuterium to diffuse out. Attempts to overcome these problems have relied on expensive techniques, such as using deuterated silane and ammonia to form the silicon nitride layers, or dangerous techniques, such as annealing in a 100% deuterium atmosphere.
U.S. Pat. No. 6,436,799 describes incorporating deuterium by annealing in a deuterium-containing atmosphere. A small exposed portion of the substrate near the interface is present after etching contact holes in the etch-stop layer, which takes place after formation of the etch-stop layer and the interlayer dielectric. At this point there will be no further exposure of the substrate/gate dielectric interface to temperatures above 750° C., so the incorporated deuterium will not be lost.